8. Release Notes¶
8.1. LegUp HLS EAP 9.2 Release Notes¶
Release date: March 3, 2021
8.1.1. Software Features and Enhancements¶
- Added support for new
legup::thread
multi-threading API (see Multi-threading with LegUp Threads)
8.1.2. Resolved Issues¶
The following defects and enhancement requests were resolved:
- HLS-42: Libero 12.6 complains about set_option -rom_map_logic.
- HLS-50: Sobel tutorial part 3 to match the syntax as part 1 & 2.
- HLS-59: Fix the memory port names to a more understandable convention.
- HLS-60: Give a proper error when there are multiple top-level functions specified.
- HLS-63: Sefault if the top-level function pragma is removed from Sobel tutorial part 1.
- HLS-78: Loop pipeline support for variable loop bounds.
- HLS-97: Fmax improvements for customer design.
- HLS-121: Cannot access AXI4 slave without starting the accelerator (in concurrent_access mode).
- HLS-129: loop unrolling crashes some designs.
- HLS-142: Running Libero synthesis, P&R from LegUp will fail with Libero 12.5 or before on Windows.
- HLS-149: LLVM’s loop-unswitch performs an unwanted loop replication.
- HLS-156: CoSim: wrong values for ap_uint type being fed to the DUT.
- HLS-162: Verilog name conflict in generated Verilog between a RAM instance and a register.
- HLS-164: Cannot expand grouped AXI4stream ports in SmartDesign for HDL+ block.
- HLS-165: Some memory interfaces are not showing in the interface report.
- HLS-168: Clang errors out with none type memory partition pragma.
- HLS-200: Can’t set multiply latency when split mult is enabled.
- HLS-201: Execute create_hdl_plus.tcl from Libero got LEGUP_ROOT_DIR not set error.
- HLS-203: ScheduleViewer does not work when LegUp installation and workspace are in different drives.
- HLS-206: Red-line in Eclipse complaining about legup::thread/ref.
8.2. LegUp HLS EAP 9.1 Release Notes¶
Release date: Jan 4, 2021
8.2.1. Software Features and Enhancements¶
- Only support targeting Microchip PolarFire FPGAs
- Support for Libero 12.6
- Libero SmartDesign integration (see Instantiating LegUp IP Core in Libero SmartDesign)
- Added support for pragmas (see LegUp Pragmas Manual) in the source code to specify LegUp user constraints instead of using Tcl commands.
- Support for math.h functions (see C Numerics Library (math.h in C / <cmath> in C++))
- Documentation of top-level RTL interfaces (see Top-Level RTL Interface)
- Improvements to memory partitioning (see Memory Partitioning)
- Added Microchip software end-user license agreement (EULA)
8.2.2. Resolved Issues¶
The following defects and enhancement requests were resolved:
- Synthesize with Libero block flow to avoid limited number of top-level I/O pins
- Fixes for RAM initialization and reset logic
- Fix LegUp IDE cancel button on Windows
- Fix Libero FMax parsing
- Better error messages for unsupported C++ features (vector, map, etc.) and unsupported co-simulation cases